1. Field of the Invention
The present invention generally relates to processing graphics primitives, and, more specifically to caching coverage information.
2. Description of the Related Art
In graphics processors, rasterization is the process of converting screen-space triangles into a set of samples (pixels) covered by that triangle. Rasterization is one of the most computationally demanding stages in the graphics processing pipeline, and, as parallelism has increased within the graphics processing pipeline, the dedicated hardware rasterizers have become increasingly parallel. A typical technique that is used to increase rasterization parallelism is to test, in parallel, every sample within a given screen-space region, such as a tile, against each triangle in a model, where a different unit within the rasterizer is responsible for testing each of the different samples.
Increasingly, graphics applications are modeling objects using triangle meshes where adjacent triangles share an edge. One drawback of conventional highly parallel rasterization techniques is that, the shared edges are sampled twice, once for each one of the two triangles. Therefore, more power is consumed by highly parallel rasterizers when rasterizing triangle meshes and other like graphics constructs compared with less parallel rasterizers.
As the foregoing illustrates, what is needed in the art is a technique that reduces the amount of power consumed by highly parallel rasterizers when rasterizing graphics constructs that share edges, like triangle meshes.